Epitaxial lift-off (ELO) process has been extensively explored for low-cost flexible optoelectronics application via substrate reuse since 1978. Although GaAs thin films have been successfully transferred onto different foreign substrates with the conventional ELO process for flexible solar cell, transistors and etc., it has been proven that several post process are still required for the reuse of GaAs substrate, which increase the overall cost and prevents flexible GaAs devices from being widely applied. Here we will introduce the fundamental principles of ELO process and the drawbacks of the conventional method, then present a novel ELO scheme where the conventional aluminum arsenide based sacrificial layer and HF based etchant are replaced with phosphide based materials and HCl . This new approach minimizes the postetching residues on the wafer and provides the surface passivation that keeps the surface smooth during the ELO process, leading to direct reuse of the GaAs substrate.
Following this new ELO chemistry, a new liftoff technique called surface tension assisted ELO (STAELO) was proposed and developed to increase throughput and yield to lower the overall process cost. With STAELO process, full wafer GaAs thin films are successfully transferred onto both rigid and flexible substrates. We also demonstrate several devices, including light emitting diode (LED) and metal-oxide-semiconductor capacitor (MOSCAP) on foreign substrates, first built on thin active layers and then transferred to secondary substrates. These results show promise of using this new ELO process for low cost, high volume III-V device fabrication.
Cheng-Wei received his B.S. and M.S. in Material Science and Engineering in National Tsing-hua University in Taiwan in 2001 and 2003. After two years mandatory military service, he came to Massachusetts Institute of Technology (MIT) and focused his research on high-k material passivation of III-V materials and he received his Ph.D. degree of Material Science and Engineering in 2010. Then, he joined IBM as Research Scientist to develop technology for low-cost high efficiency III-V solar cell and integration of lattice mismatched materials on Silicon. His current research focuses on integration of InGaAs materials on Si for high-speed III-V transistor in Si CMOS application. Cheng-Wei Cheng currently publishes 20 papers and holds 61 patents.