The hardware synthesis of complex parallel embedded systems requires a modular approach where each component is analyzed and synthesized separately before being integrated in the larger system. The Alpha language, since it allows a functional description of an algorithm to be mapped to a parallel hardware implementation, and since it allows components to be described hierarchically by Alpha subsystems, is a good framework for studying and experimenting such an approach. During this talk, we explain how Alpha can be used to model data-flow systems, to schedule a hierarchy of data-flow components, and to generate parallel hardware implementations.
Patrice Quinton is Professor Emeritus in Computer Science at Ecole normale supérieure de Rennes, France. Formerly President of ENS Rennes, he graduated in 1972 from ENSIMAG in Grenoble, and obtained a PhD degree in Computer Science from the University of Rennes 1 in 1980. His scientific interests are parallel computing and parallel architectures, in particular, the synthesis of parallel program using the polyhedral model of loops.