C. Andras Moritz
309H Knowles Engineering Bldg
University of Massachusetts
151 Holdsworth Way
Amherst MA 01003-9284
Research Scientist at MIT, 1997-2000
Ph.D., Royal Institute for Technology, Stockholm, Sweden, 1998
M.S., Technical University, Cluj-Napoca, Ro., 1985
Nanoscale architectures, nanoelectronics, nanoscale circuits, nanoscale fabrics, low power microprocessor design, single-chip multiprocessors, compiler-architecture interaction, and security
- Csaba Andras Moritz, Teng Wang, Pritish Narayanan, Michael Leuchtenburg, Yao Guo, Catherine Dezan, and Mahmoud Bennaser Fault-Tolerant Nanoscale Processors on Semiconductor Nanowire Grids, IEEE Transactions on Circuits and Systems I, special issue on Nanoelectronic Circuits and Nanoarchitectures, vol. 54, iss. 11, pp. 2422-2437, November 2007.
- Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz, Coupling Compiler-Enabled and Conventional Memory Accessing for Energy Efficiency, ACM Transactions on Computer Systems (TOCS), Vol 22, No. 2, pp. 180-213, May 2004.
- Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz, Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors, ACM Transactions in Embedded Computing Systems (TECS), Special issue on power-aware embedded computing, Vol. 2, No. 3, pp. 373-392, Aug 2003.
- Csaba Andras Moritz, Donald Yeung, Anant Agarwal, SimpleFit: a Framework for Analyzing Design Tradeoffs in Raw Architectures, IEEE Transactions on Parallel and Distributed Systems, Volume 12, Number 7, pp. 730-742, July 2001.
Four issued patents. IEEE Symposium on VLSI 2008 Best Paper Award, IEEE Symposium on Nanoscale Architecture 2009 Finalist Best Paper 2009, FENA 2008 FCRP Review Best Poster Award, etc.
Associate Editor of IEEE Transactions on Nanotechnology 2009-.
Associate Editor of IEEE Transactions on Computers 2001-2006.
Technical Committee Member for Emerging Technologies in ACM/SIGDA 2006-.
Special Session Chair IEEE/ACM Symposium on Nanoscale Architectures 2009.
Moderator Nanocomputing Session at IEEE ICCAD 2006.
Program Committee Member IEEE Symposium on Nanoscale Architectures 2007-2009, IEEE Nanonet 2006, WASSA 2004 (with ASPLOS 2004), PACS 2004 (with MICRO 2004).
Co-Chair Boston Area Architecture Workshop 2004, 2005.
Tutorial Chair IEEE/ACM Intl. Conference on Parallel Architecture and Compilation Techniques (PACT) 2003.
Member Instructional Development Committee, Internal Advisory Board, College Computer Services. Chair Embedded Systems Faculty Search 2008.