Daniel Holcomb | Electrical and Computer Engineering

Associate Professor

Office: Knowles 309H

Mailing Address:
309H Knowles Engineering Bldg
University of Massachusetts
151 Holdsworth Way
Amherst, MA 01003-9284

(413) 545-6593

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Education

B.S. Electrical & Computer Engineering, University of Massachusetts 2005

M.S. Electrical & Computer Engineering, University of Massachusetts 2007

Ph.D. Electrical Engineering and Computer Sciences, University of California Berkeley 2013

Research

Embedded Systems

Security

Formal Verification and Design Automation

VLSI

Publications

D.E. Holcomb, K. Fu, "Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM," Cryptographic Hardware and Embedded Systems--CHES 2014, pp 510--526, 2014
U. Ruhrmair and D.E. Holcomb, "PUFs at a glance," Design, Automation and Test in Europe, 2014
D.E. Holcomb, S.A. Seshia, "Compositional Performance Verification of Network-on-Chip Designs," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 33, No. 9, pp 1370--1383, 2014
A. Rahmati, M. Salajegheh, D.E. Holcomb, J. Sorber, W.P. Burleson and K. Fu, "TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks, 21st USENIX Security Symposium (USENIX Security 12), pp 221-236, 2012
D.E. Holcomb, W. Li, S.A. Seshia, "Design as you see FIT: System-level soft error analysis of sequential circuits," Proceedings of the Conference on Design, Automation and Test in Europe, pp 785--790, 2009
D.E. Holcomb, W.P. Burleson, K. Fu, "Power-up SRAM state as an identifying fingerprint and source of true random numbers," IEEE Transactions on Computers, Vol. 58, No. 9, pp 1198-1210, 2009

Honors

Institute of Electrical and Electronics Engineers (IEEE); Tau Beta Pi Engineering National Honor Society

Experience

Research Fellow at University of Michigan 2014
Member of program committee for Secure Component and System Identification workshop (SECSI) 2010, and for Workshop on RFID Security and Privacy (RFIDSec) 2015

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