Maciej J. Ciesielski | Electrical and Computer Engineering

Professor

Associate Department Head

Office: Knowles 209D

Mailing Address:
209D Knowles Engineering Bldg
University of Massachusetts
151 Holdsworth Way
Amherst, MA 01003-9284

ciesiel@ecs.umass.edu

(413) 545-0401

Personal Academic Website

Full Curriculum Vitae

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Education

M.S., Warsaw Technical University, 1974;
Ph.D., University of Rochester, 1984

Research

Electronic Design Automation for digital systems. Formal methods in Computer-Aided Design. Behavioral and RTL synthesis. Formal verification and design validation

Research Area:

Computer & Embedded Systems

Publications

A. Yasin, T. Su, S. Pillement, M. Ciesielski, "Hardware-based Implicit Rewriting for Square-root Verification". Design, Automation and Test in Europe Conference, DATE-2020, March 2020.
M. Ciesielski, T. Su, A. Yasin, C. Yu, "Understanding Algebraic Rewriting for Arithmetic Circuit Verification: a Bit-Flow Model" IEEE Transactions on CAD, April 2019
C. Yu, M. Ciesielski, "Formal Analysis of GF Arithmetic - Parallel Verification and Reverse Engineering". IEEE Trans. on CAD, Vol. 38, No. 2, pp. 354-365, Feb. 2019.
C. Yu, M. Ciesielski, A. Mishchenko, "Fast Algebraic Rewriting Based on And-Inverter Graphs", IEEE Transactions on CAD, Vol. 37, No. 9, pp. 1907-1911, Sept. 2018.
C. Yu, W. Brown, D. Liu, A. Rossi, M. Ciesielski, "Formal Verification of Arithmetic Circuits by Function Extraction", IEEE Transactions on CAD of Integrated Circuits and Systems, 35(12): 2131-2142, Dec. 2016.

Honors

IEEE Fellow 2020; First Place at Hack@DAC, DAC 2017, Hardware Security Contest (with Cunxi Yu); Residential First-Year Experience (RFYE) Student Choice Award, UMass, 2013; Nominee for University Distinguished Teaching Award, 2011 - 2014; Doctorat Honoris Causa, Université de Bretagne Sud, Lorient, France, May 2008.

Society Memberships:

IEEE, Circuits and Systems, CEDA

Experience

Institutional & Professional Service:

Associate Department Head (since Sept. 2006), ECE Graduate Seminar Committee, ECE Personnel Committee, ECE Department Accreditation ABET Task Force, Member of Technical Program Committees at several international conferences and workshops (VLSI, ICCAD, IWLS, ECECS, CFV), Session and Topic Chair at DAC 2006, CFV 2008.

Links

CV:

ciesielski_CV-Oct2017.pdf

Homepage:

http://www.ecs.umass.edu/ece/labs/vlsicad/ciesielski.html

Lab Affiliation:

VLSI CAD Lab

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